A simple ALTERA FPGA development environment  

Table of contents

Purpose

While working on a project I came across the problem of having more and more TTL chips and less and less available space on the board. So what to do? One very elegant sollution is to integrate most or all TTL funtionallity into a single PLD chip. So let's design our own chip. First you will need some sort of programming hardware and a board where you can test your chip design (and reuse it with other designs)

For this you can either buy a commercially available developer kit for a few hundred euros our you can build your own.

This project uses programable chips from Altera just because they where readily available but there are also others like for example Xilinx.

To start with programmable logic devices just build the programmer cable and the module and download the programmer software from the altera homepage and that's it.

This page is not intended to teach you how to design your chips (ther are numerous other, better ones - see the links at the end of this page)! 

DISCLAIMER:
THIS CONTENT IS PROVIDED TO INTERESTED PEOPLE "AS IS" FOR NON COMERCIAL
PURPOSE ONLY. UNDER  NO CIRCUMSTANCES I AM RESPONSIBLE  FOR ANY DAMAGES 
TO  YOUR RADIO, PC OR OTHER  EQUIPMENT. THIS  DEVICE  WAS TESTED  UNDER 
DIFFERENT  CONDITIONS   AND  UNTIL  NOW  IT  WORKS   WITHOUT  PROBLEMS.

Schematics

JTAG programmer schematic
Image 1: JTAG programmer

The PCB

The PCB Layout of the FPGA Module
Image 1: The PCB Layout of the FPGA Module

   The PCB Layout of the JTAG programmer
Image 2: The PCB Layout of the JTAG programmer
   
Component positions for the FPGA Module
Image 3: Component positions for the FPGA Module

   Component positions for the programmer
Image 4: Component positions for the JTAG programmer

You can download a PDF File with the schematic and the PCB here.
If you dont have the Adobe Acrobat Reader installed on your machine you can find it here

Pictures of the finished Module

Here you can see how the module looks during different stages of the building process and how it looks when it's finished. A picture says more than thousand words.

The PCB's for the programmer and the FPGA Module
Image 5: The PCB's for the programmer and the FPGA Module

The JTAG programmer PCB inside the LPT Plug
Image 6: The JTAG programmer PCB inside the LPT plug 		  The finished FPGA Module
Image 7: The finished FPGA Module
   
The finished JTAG Programmer
Image 8: The finished JTAG programmer 		  and a CloseUp
Image 9: A CloseUp of the finished programmer

Notes & Comments

A good introduction to logic design using Altera chips can be found at http://tutor.al-williams.com/pld-1.htm.
 
  • 2004-01-27
    Sometimes it is necessary to connenct a 100nF Capacitor between VCC and GND near to the FPGA chip. See the picture below:
     
    100nF Capacitor
    Image 10: 100nF Capacitor at the FPGA Chip

    • in the Press

    This paper can also be found in the german HAM Radio Magazine
    "Funkamateur" at www.funkamateur.de, Issue 11 / 2003, Page 1090,
    Title: "Wir bauen uns einen PLD-Chip!"

    Credits

    OE1RIB, Richard
    If you have any comments or sugestions just drop me a line.

    73, OE1RIB